Superconducting Electronics Integrated Circuit Design Engineer with Security Clearance

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Job description

All Qualified Resumes Will Be Responded to in 24 Hrs or Less US Citizen willing to submit for a DOD Clearance. All work is on-site AForge offers a full suite of Benefits: 100% medical, Dental, 401k, PTO, and Holiday compensation. This position can be filled at multiple levels Required Education: Bachelor's degree in a technical area with 5 years of experience in in either Analog, Digital or Mixed Signal Circuit design (3 years with technical MS or 0 years with a PhD) -OR- Bachelor's degree in a technical area with 9 years of experience in either Analog, Digital or Mixed Signal Circuit design (7 years with technical MS or 4 years with a PhD). Required Skills: Solid understanding of circuit design theory; hands-on custom circuit design experience Experience with IC custom design tools (preferably Cadence Virtuoso) for schematic capture, circuit simulation, and custom layout; physical verification using Assura or Calibre Basic understanding of IC manufacturing and testing processes Strong problem solving and analytical skills Ability to meet tight deadlines and milestones according to program schedule Excellent communication skills, able to efficiently disseminate information to leadership and respective working group Desired Skills: Understanding of hierarchical and top-down design methodology Create and maintain chip design schedule, and meet tight deadlines in accordance with the overall program schedule Microwave engineering background; solid understanding of transmission line theory and impedance matching techniques Electromagnetic modeling background with commercial tools, such as HFSS, CST, Clarity Understanding of combinatorial and sequential logic Programming experience using an objected oriented language like Python or C++ Experience with product validation and testing Knowledge of Quantum Information or Quantum Mechanics Additional Desired Skills for Sr. Lvl Position: Experience with hierarchical design, top-level floor-planning, and chip-level integration Experience with product validation and testing Scripting experience with SKILL

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