Mixed Signal IC Design Senior Engineer
Raytheon
2024-11-10 17:42:12
Goleta, California, United States
Job type: fulltime
Job industry: Engineering
Job description
Date Posted:
2024-07-23Country:
United States of AmericaLocation:
CA602: Goleta (RVS) Bldg B Cortona Drive Building B01, Goleta, CA, 93117 USAPosition Role Type:
HybridAt Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today's mission and stay ahead of tomorrow's threat. Our team solves tough, meaningful problems that create a safer, more secure world.
We have an exciting opportunity for a M ixed Signal IC design Senior Engineer to join our strong team. In this position you will be part of a talented team responsible for the design, development, and verification of read-out ICs (ROICs) for visible and infrared focal plane arrays. A successful candidate will excel at collaborating in a fast-paced multidisciplinary team environment working to develop cutting-edge image sensor products.
As part of this team, you will be participating in mixed-signal ASIC/ROIC development activities with cross-functional teams including chip architecture, specification, design, verification, validation, fabrication, packaging, debugging, test development, failure analysis, and documentation.
What You Will Do:
- Design and develop mixed-signal integrated circuits for image sensors, including analog signal chain, digital timing and image processing, and low-power 12 - 14 bit on-chip analog to digital converters.
- Collaborate in cross-functional integrated product development teams to deliver on customer requirements with consideration for efficiencies in strategic investment, cost, schedule, and process adherence.
- Provide support to the department in other areas such as CAD support in CMOS and scripting languages in Linux and Windows environments as well as Layout lead doing chip-level floor planning.
Qualifications You Must Have:
- Typically requires a Bachelor's degree in Science, Technology, Engineering, or Mathematics (STEM) with a minimum of 5 years of prior relevant experience, or a MS degree and minimum of 3 years experience.
- Experience in mixed-signal full-custom CMOS Integrated Circuit (IC) design at the transistor level.
- Experience with semiconductor device physics, semiconductor processing, linear IC design, simulation, layout, and testing.
- Comprehensive understanding of IC layout flows, methodologies and layout of digital and analog blocks for use in larger mixed-signal circuits, CAD tools, and statistical design.
- Knowledge and ability to hand layout critical analog and mixed-signal circuits.
- U.S. citizenship is required, as only U.S. citizens are authorized to access information under this program/contract.
Qualifications We Prefer:
- Experience with high-end Linux-based software design tools for circuit simulation, transistor model extraction, noise analysis, linear design, chip-level floor-planning, IC layout and automation, and verification.
- Experience with LVDS transmitters and receivers, low noise and low power amplifiers, ADC design, PLL/Transmitter design and radiation and cryogenic tolerant design techniques.
- Analysis and programming experience using MATLAB and at least one computer programming or scripting language (e.g. SKILL, Perl, Tcl, Python, C/C++) in Linux & Windows environments.
- Modelling experience with System Verilog/Real Modelling/Verilog AMS and coding synthesizable RTL.
- Experience in installing, maintaining, and troubleshooting of PDK environments for semiconductor foundries. Experience in PDK development.
What We Offer:
- Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Trust, Respect, Accountability, Collaboration, and Innovation.
RTX is An Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age or any other federally protected class.
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